1. Field of the Invention
The present invention relates to a semiconductor apparatus manufacturing method and a semiconductor apparatus.
2. Description of the Related Art
The recent reduction in size and improvement in performance of electronic equipment have created a demand for a semiconductor apparatus that is smaller in size and higher in packaging density. Three-dimensional packaging is an effective measure of giving a semiconductor apparatus a smaller size and a higher packaging density. As one of the technologies that constitute the nucleus of three-dimensional packaging, the importance of penetrating electrode technology which is about an electrode connecting a front surface and a rear surface of a semiconductor substrate is increasing.
Raising the packaging density of the semiconductor apparatus with the use of penetrating electrode technology has been practiced. In those practices, wiring is formed on the rear surface of a semiconductor substrate to be connected on the rear surface of the semiconductor substrate to an external terminal, multiple semiconductor substrates prepared in this manner are stacked on top of one another, and the front and rear surfaces of each semiconductor substrate are electrically connected.
The needs for the semiconductor apparatus with a penetrating electrode are increasing in various fields including semiconductor chips for use in semiconductor memories, CMOS sensors, AF sensors, and other similar applications, semiconductor packages in which multiple semiconductor chips are stacked, and connectors for ink jet heads.
A conventional way to manufacture a penetrating electrode is as follows. First, a semiconductor substrate on which an electrode pad has been formed is prepared. Next, a mask pattern is formed on the rear surface of the semiconductor substrate to etch the semiconductor substrate so that a through-hole piercing the semiconductor substrate is formed. The through-hole runs from a point on the rear surface that corresponds to the location of the electrode pad to the front surface, exposing the electrode pad. An insulating film is then formed on the rear surface of the semiconductor substrate including the interior of the through-hole. Next, the insulating film at the bottom portion of the through hole is etched to expose the electrode pad and, after that, a conductive layer is formed. A penetrating electrode is thus manufactured.
With this manufacturing method, however, when the step of etching the insulating film at the bottom portion of the through-hole (bottom etching) employs, for example, reactive ion etching, electric field concentration occurs in the insulating film at the corners of the opening portion and bottom portion of the through-hole in the semiconductor substrate. The electric field concentration makes the density of the reactive ion at the corners higher than other portions. As a result, the insulating film at the corners of the opening portion and the bottom portion is etched at an accelerated rate, and could end up being very thin or completely etched away. In addition to the insulating film at the corners, the bottom etching described above tends to remove the insulating film on the inner wall of the through-hole more than necessary. An insulation failure sometimes occurs as a consequence between a penetrating electrode that is formed in the through-hole after the bottom etching and the semiconductor substrate.
A solution to this is proposed in U.S. Pat. No. 7,094,701.
U.S. Pat. No. 7,094,701 discloses two methods. In one method, a reinforcement insulating film 16 is formed on an insulating film 10 so that an overhang portion 18 is created at a through-hole opening portion as illustrated in FIG. 7, and then bottom etching is performed to remove the insulating film 10 from a through-hole bottom portion and expose an electrode pad 22. In the other method, eaves are created from a hard mask 17 at a through-hole opening portion as illustrated in FIG. 8, and bottom etching is performed with the eaves as a mask to remove an insulating film 10 from a through-hole bottom portion and expose an electrode pad 22.
With the method that uses the reinforcement insulating film, the bottom etching step described above can expose the electrode pad 22 but leaves the protrusion of the reinforcement insulating film at the through-hole opening portion.
Further, the method that uses hard mask eaves has a similar problem in that the protrusion remains after the bottom etching.
The protrusions in the reinforcement insulating film method and the hard mask eaves method create surface irregularities in the insulating film on through-hole inner wall after the bottom etching, and the surface irregularities on the through-hole inner wall present obstacles that leave some spots bare of a barrier layer and a seed layer.
The resultant lowering in yield and reliability of the semiconductor apparatus has been an unsolved problem.